Our Sovereign Technology
- Patented mature silicon proven, AJIT Processor IP Core.
- APARAJIT AIML Accelerator
- NavIC
Mature Patented AJIT Processor IP Core license
- Academic license is provided with bundled training from IIT
- Industry license; we work with customer to build System on Chip.
AI Silicon Infrastructure based on AJIT Core
- Edge Computing AI Chip for UAV that is integrated with IRNSS for positioning (also enabled for GPS, GLONASS, BeiDou and Galileo).
- AI Chip for enterprise‑grade AI models.
- AI Chip for Super Computing.
- Data Centre Chips
For more details, please drop an email to us at powailabs full stop com
Semiconductor IP for Intelligent SoC Development
Powai Labs develops indigenous semiconductor IP for organisations building custom System-on-Chip (SoC) platforms.
The portfolio combines the AJIT Processor Core IP, APARAJIT AI Accelerator IP family, and the NavIC Processor under development, bringing together programmable processing, AI acceleration and future navigation capabilities.
AJIT PROCESSOR CORE IP
AjIT Processor IP Core based on two granted Patents.
AJIT Processor IP Core family is available in 32 bit and 64 bit; single core, dual core and multicore. AJIT is proven on silicon and is being used in some critical System on Chip implementations. Ajit comes with all the software tools chain.
Documented Development
AJIT development includes a 180 nm proof-of-concept implementation at SCL Chandigarh and an AJIT-based NAVIC GPS IRNSS receiver SoC fabricated in 65 nm technology at UMC Taiwan. The AJIT Manual reports the NAVIC receiver SoC as functional following first-silicon testing.
Key Capabilities
APARAJIT AI ACCELERATOR IP
Scalable AI Acceleration for Intelligent Computing
APARAJIT is a licensable AI Accelerator IP developed for AI inference, tensor processing and parallel computing.
Available in Micro, Mini and Mega configurations, APARAJIT uses a common architecture across the product family, supporting software portability while allowing different deployment configurations. It is designed to operate alongside the AJIT Processor Core IP within custom SoC platforms.
Architecture Highlights
Supported Precision Formats
APARAJIT MICRO
Compact Configuration for Intelligent Embedded Systems
APARAJIT Micro is the compact configuration within the APARAJIT AI Accelerator IP family.
It combines one AJIT Processor Core with one APARA AI Accelerator Core within the APARAJIT architecture. It is intended for compact embedded AI and intelligent computing applications.
APARAJIT MINI
APARAJIT Mini is a mid-range AI Accelerator IP configuration combining four AJIT Processor Cores and four APARA AI Accelerator Cores.
It is designed for AI-enabled embedded applications such as autonomous vehicles, tactical communications, smart controllers, and industrial systems, with software portability across the APARAJIT family.
APARAJIT MEGA
APARAJIT Mega is the highest-capacity configuration of the APARAJIT AI Accelerator IP family, combining 64 AJIT Processor Cores and 64 APARA AI Accelerator Cores.
It is designed for high-performance edge computing, real-time telemetry, signal processing, portable computing, and large-scale AI inference, with software portability across the Micro, Mini, and Mega configurations.
NAVIC PROCESSOR
Navigation Processor for Next-Generation Positioning and Navigation Systems
The NavIC Processor is a dedicated navigation processor currently under development.
It is being developed alongside the AJIT Processor Core IP and APARAJIT AI Accelerator IP to extend the Powai Labs portfolio with future navigation capabilities and support navigation-enabled System-on-Chip platforms.
Planned Application Areas
The processor is not currently available. Detailed architecture, technical specifications, implementation guidance, product documentation and licensing information will be announced following completion of the licensing process.
Looking to Integrate Semiconductor IP Into Your SoC?
Connect with Powai Labs for product information, technical discussions and licensing enquiries related to its semiconductor IP portfolio.