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Indigenous Semiconductor Innovation Since 1999

Founded at IIT Bombay, Powai Labs develops indigenous semiconductor IP for next-generation processor and intelligent SoC development.

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Processor Intelligence.
AI Acceleration.

AJIT Processor Core IP and APARAJIT AI Accelerator IP bring programmable processing and dedicated AI acceleration together for intelligent SoC platforms.

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Building the Semiconductor Technologies of Tomorrow

From AJIT processor technology to scalable APARAJIT AI acceleration and emerging NavIC processor technology.

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OUR SEMICONDUCTOR PORTFOLIO

Technology for Intelligent System-on-Chip Development

Powai Labs develops semiconductor IP for organisations building next-generation computing platforms.

AJIT Processor Core IP Icon

AJIT
Processor Core IP

A configurable processor core IP designed for programmable processing, system control, memory management and SoC development.

APARAJIT AI Accelerator IP Icon

APARAJIT
AI Accelerator IP

A scalable AI Accelerator IP for AI inference, tensor processing and parallel computing, available across Micro, Mini and Mega configurations.

NavIC Processor Icon

NavIC
Processor

An upcoming navigation processor being developed to extend the Powai Labs semiconductor portfolio into navigation-enabled intelligent systems.

The portfolio combines processor technology, AI acceleration and future navigation capabilities for a range of intelligent semiconductor applications.

OUR STORY

From IIT Bombay Research to Indigenous Semiconductor IP

Powai Labs’ semiconductor journey began at IIT Bombay in 1999. The company’s founding story includes a Texas Instruments-funded research programme at IIT Bombay, followed by incubation through SINE, IIT Bombay.

Today, Powai Labs continues to develop processor architectures and AI accelerator technologies through indigenous semiconductor research and engineering.

Processor Technology

AJIT Processor Core IP

AI Acceleration

APARAJIT AI Accelerator IP

Future Technologies

Navigation processor development

WHY POWAI LABS

Complementary Semiconductor IP for Modern SoCs

Developing intelligent semiconductor products requires processor and AI technologies that can work together efficiently within a System-on-Chip architecture.

Research-Driven Engineering

Built on indigenous semiconductor research, Powai Labs develops Processor Core IP and AI Accelerator IP for modern semiconductor products.

Complementary IP

AJIT provides programmable processing and system control, while APARAJIT provides dedicated AI acceleration.

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Scalable Portfolio

The APARAJIT family provides multiple deployment configurations while maintaining a common hardware and software architecture.

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Intelligent Computing

Supports embedded systems, robotics, automation, AI, defence, aerospace, navigation, and edge computing.

APPLICATIONS

Semiconductor Technologies for Intelligent Computing

Powai Labs semiconductor technologies support a range of applications, including:

Automotive

Semiconductor technologies for intelligent automotive and embedded computing applications.

Defence & Aerospace

Technologies supporting defence electronics, aerospace applications, tactical communication systems, navigation technologies and autonomous platforms.

Robotics & Industrial Automation

Processor and AI acceleration technologies for intelligent machines and industrial systems.

Edge AI & Embedded Systems

AI acceleration and programmable processing for embedded and intelligent computing platforms.

Navigation & Autonomous Systems

Future navigation processor technologies designed to complement the AJIT and APARAJIT portfolio.

AJIT – A DOCUMENTED PROCESSOR JOURNEY

From Processor Architecture to Silicon

The AJIT processor family is documented across multiple configurations, including CPU32 and CPU64 implementations, with single-core and multi-core, single-thread and multi-thread configurations.

The AJIT development history also includes ASIC implementation work, including a 180 nm proof-of-concept implementation at SCL Chandigarh and an AJIT-based NAVIC GPS + IRNSS receiver SoC fabricated in 65 nm technology at UMC Taiwan. The manual reports the NAVIC receiver SoC as functional following first-silicon testing.

IMPRESSIONS

Recognised by Leaders Across Industry, Government and Research

Powai Labs’ original website featured industry and institutional impressions from leaders including Montek Singh Ahluwalia, Avinash Kanade, R. Muralidharan and Dr. R. A. Mashelkar.

Isnessing innovation through:
Quality, Price and Technology
INDUSTRY RECOGNITION

Powai Labs at VLSID 2020

Powai Labs was invited to participate in a Fireside Chat at VLSID 2020, reflecting its engagement with India’s VLSI and semiconductor ecosystem.

VLSID 2020 Video BG_Cover
OUR TECHNOLOGY JOURNEY

Indigenous Semiconductor Research Since 1999

1999

Research origin at IIT Bombay

Texas Instruments

TI-funded research programme at IIT Bombay

SINE

Incubation through IIT Bombay's SINE ecosystem

AJIT

Processor architecture and processor development

ASIC Development

AJIT implementations across semiconductor technologies

Today

AJIT Processor Core IP, APARAJIT AI Accelerator IP and future navigation processor technologies

This timeline directly addresses the client’s requirement to connect Powai Labs’ historical semiconductor work with its current IP portfolio.

RESEARCH & INNOVATION

Advancing Indigenous Semiconductor Research

Research continues to drive the development of processor architectures and AI accelerator technologies at Powai Labs. Current research areas include:

CPU32 & CPU64

Documented implementations across 32-bit and 64-bit architectures.

Scalable Configurations

Single-core / Multi-core
Single-thread / Multi-thread configurations.

180 nm PoC

Proof-of-concept ASIC implementation at SCL Chandigarh.

65 nm NAVIC SoC

AJIT-based NAVIC GPS + IRNSS receiver SoC fabricated at UMC Taiwan.

First-Silicon Success

NAVIC receiver SoC reported as functional after first-silicon testing.

NEWS & INSIGHTS

Engineering Updates and Technical Resources

Explore Powai Labs’ technical developments, research, company milestones and industry participation.

FAQ’s

Powai Labs Frequently Asked Questions

Processor Core IP is a pre-designed processor architecture that can be licensed and integrated into custom System-on-Chip (SoC) designs.

An AI Accelerator is specialised hardware designed to accelerate AI inference, tensor processing, and parallel computing workloads.

APARAJIT combines the AJIT Processor Core IP and APARA AI Accelerator technology within a unified semiconductor architecture for intelligent computing applications.

Applications include embedded systems, robotics, industrial automation, defence, aerospace, AI-enabled systems, navigation technologies, autonomous platforms, and edge computing.

AJIT Processor Core IP supports:

  • → GCC / G++, Binutils, GDB
  • → CORTOS-2, FreeRTOS, RTEMS, Zephyr, Linux

Additional development resources include the Hardware Abstraction Layer (HAL), Verification Suite, Validation Examples, Application Programming Support, Open-Source Toolchain, and Technical Documentation.

Building the Next Intelligent Semiconductor Platform?

Explore Powai Labs’ processor and AI accelerator technologies for your next SoC development.