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Myth: Simulation Accelerators are expensive
Fact: IMAGE costs as little as a software simulator license |
Myth: Simulation Accelerators require a full-time resource
Fact: IMAGE can be used by a design or verification engineer
with little or no training |
Myth: I can only use simulation accelerators for system level/top level simulation
Fact: With IMAGE’s scalable architecture, low
cost and performance advantages, design teams can
use it for unit-level testing earlier in the design cycle |
Myth: We do not need simulation accelerator
Fact: Up to 70% of design cycle time is spent on verification
on large complex designs. Designs need to run larger
regression suites for longer duration to ensure first pass
silicon success, most designs are taped out before verification
test suite is exhausted. |
Myth: FPGA based accelerators are slow
Fact: All designs need to be mapped to hardware. Some call it
synthesis, others call it mapping. With hyper threaded processor
and several GB of RAM on an IMAGE server, fpga mapping
is fast and efficient. |
Myth: Simulation accelerators cannot accelerate all HDL constructs and memory models
Fact: IMAGE will accelerate all synthesizable HDL constructs
and can also accelerate memory models |
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